When the input signal voltage to an ideal operational amplifier (op amp) is zero, the output voltage is also zero. However, this ideal state rarely exists, since real op amps suffer imperfections to circuit components which cause a voltage to exist at the output even with a zero input. This voltage is called the output offset voltage or drift voltage, and can be troublesome if not entirely eliminated or at least significantly reduced.
Offset correction can be achieved using a stabilization technique in which the output of the amplifier for a null input is first stored and then interconnected with the amplifier input so as to cancel any offset. It is noted, however, that the stored voltage usually decays between each interconnection cycle, so that the frequency and duty cycle of the switch which controls the interconnection must be appropriately chosen in light of the nature of the input signal being processed in the op amp, the amount of offset expected, the frequency characteristics of the amplifier and the amount of distortion that can be tolerated. The usefulness of this technique in eliminating offset also depends upon the particular op amp circuit application involved. Specifically, in situations in which the input to the op amp is a series of samples, the off time between samples can be used to correct or eliminate the offset voltage. This advantageously eliminates any problems associated with noise introduced during the interconnection operation. On the other hand, when the input to the amplifier is continuous, the discontinuity caused by switching can be a significant problem.
Offset correction of the type described above is illustrated in U.S. Pat. No. 3,448,393 issued to W. W. Rice, Jr., on June 3, 1969. As shown in FIG. 2, the offset voltage generated in amplifier 40 is stored in capacitor C48 when switch S50 is connected to contact 46 and the amplifier input is at ground potential. During the operating cycle, the switch is repositioned to connect the capacitor to the amplifier input 42 via contact 47 and resistor R49, effecting offset cancellation.
Another offset cancellation approach is disclosed in U.S. Pat. No. 3,988,689 issued to S. S. Ochi et al. on Oct. 26, 1976. This technique requires at least one supplementary amplifier 24 in addition to the primary op amp 10, 12, and at least one capacitor 26, which stores the offset voltage generated by the main amplifier during a short correction cycle. Thereafter, during the signal amplification (operating) cycle, the stored offset voltage is inverted, amplified and combined with the input to the amplifier, to effect cancellation. This approach, as shown in FIG. 4 of the patent, introduces a slight discontinuity into the output, which like the Rice technique, adds undesirably to the noise in the output. The discontinuity or noise can be reduced (but not totally elminated) using the refinement illustrated in FIG. 7 of the Ochi patent. In this circuit, a pair of capacitors 68 and 26 at the input of the correcting amplifier 24 are used to store the operating output voltage of the amplifier and the offset voltage, respectively. The offset is added to the operating voltage, inverted and applied, as before, to cancel the offset. The noise reduction achieved by this arrangement is graphically illustrated by comparison of FIGS. 4 and 6 in the Ochi patent.
Another offset correction technique which also requires two amplifiers is described in an article entitled "C-MOS Op Amp Offset Errors With Continuous Sampling Technique" published in Electronics, Jan. 18, 1979, p. 39. The first op amp is used to process the input signal while the offset voltage from the second op amp is stored on a capacitor. Then, the input is applied to the second op amp in series with and cancelling the offset voltage stored on the capacitor, while the offset of the first op amp is stored on a second capacitor. This provides autozeroing of the amplifier at all times, again except for a momentary switchover mode.
While the Ochi and continuous sampling techniques result in elimination of some of the noise associated with the discontinuities generated during offset correction, both require the use of at least one supplementary amplifier, adding to the cost of the circuits. Furthermore, during the offset correction cycle, a momentary switchover mode still exists, so that all noise is not eliminated.
In view of the foregoing, the broad object of the present invention is to reduce or remove offset errors in operational amplifiers without adding significant noise due to switching discontinuities. The technique desirably avoids the need for an additional amplifier, and should be easily implemented.